AIM:
Realize the given expression using sum of product (SOP) & product of sum (POS) functions from K-map reduction
COMPONENTS AND EQUIPMENTS REQUIRED:
|
Sl. No |
NAME OF THE COMPONENT |
IC NUMBER |
QUANTITY |
|
1 2 3 3 4 |
AND gate OR gate XOR gate Connecting wires Trainer Kit |
7408 7432 7486 |
1 1 1 |
THEORY:
ADDER: The simplest binary adder is called half adder. Half adder has two input bits and two output bits. One output bit is sum and other bit is carry. They are represented by s and c respectively in logic symbol. A half adder has no provision to add a carry from the lower order bits when binary numbers are added. When two input bits and carry are to be added, the number input bit become three and input combination increases to eight. For this a full adder is used like half adder, it also has a sum bit and carry bit. The new carry generated is represented by Cn and carry generated from the previous addition is represented by Cn-1.
Half Adder
Truth Table
|
A |
B |
Sum |
Carry |
|
0 |
0 |
0 |
0 |
|
0 |
1 |
1 |
0 |
|
1 |
0 |
1 |
0 |
|
1 |
1 |
0 |
1 |
Realisation of Half adder
K-Map for Sum
Sum = A B’ + A’ B
Sum = A ⊕ B
K-Map for Carry
Carry = A.B
Logical Diagram for Half Adder
Full Adder
 |
|
Truth Table
|
A |
B |
Cin |
SUM |
Cout |
|
0 |
0 |
0 |
0 |
0 |
|
0 |
0 |
1 |
1 |
0 |
|
0 |
1 |
0 |
1 |
0 |
|
0 |
1 |
1 |
0 |
1 |
|
1 |
0 |
0 |
1 |
0 |
|
1 |
0 |
1 |
0 |
1 |
|
1 |
1 |
0 |
0 |
1 |
|
1 |
1 |
1 |
1 |
1 |
Realisation of Full adder
K-Map for SUM
SUM = AB’C’IN + A’B’CIN + ABCIN + A’BC’IN
SUM = A ⊕ B ⊕ CIN
K-Map for Carry
COUT = AB + ACIN + BCIN
Logical Diagram for Half Adder
RESULT
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